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Electrically programmable and erasable nonvolatile semiconductor memory device and operating method therefor - Patent US5898606(A)

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Filed: Apr 30, 1997
Published: Apr 27, 1999

Abstract

In erasing, electrons are simultaneously injected into floating gates from sources of a plurality of memory cells. Thus, the threshold voltages of the plurality of memory cells are increased. In programming, electrons are emitted from a floating gate of a selected memory cell to a drain. Thus, the threshold voltage of the selected memory cell is reduced.

Applicants

  • MITSUBISHI ELECTRIC CORP

Inventors

  • FUTATSUYA TOMOSHI
  • FUKUMOTO ATSUSHI
  • TERADA YASUSHI
  • KUNORI YUICHI
  • MIYAWAKI YOSHIKAZU
  • KOBAYASHI SHINICHI
  • NAKAYAMA TAKESHI
  • OHI MAKOTO
  • AJIKA NATSUO
  • ONODA HIROSHI

Application Number

841372

Priority Claims

US4388993

Family Members

US5898606(A) - Electrically programmable and erasable nonvolatile semiconductor memory device and operating method therefor

Classification Codes

H01L21/8247, G11C16/06, G11C16/04, H01L27/115, H01L21/70, H01L29/788, G11C16/16, H01L29/66, H01L27/105
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